Project One
Two bit adder desing and implementation
Due between 2/11/03 and 2/18/03
Written Report

Design and implement (optional implementation) a two bit adder using the following specifications:
  1. Consists of four input bits and three output bits.
  2. The input bits are x2 x1 and y2 y1 denoting the two operands
  3. The output bits are C S2 S1. S2 and S1 are the resulting two bits and C is the carry bit.
  4. Your implementation should consist of utilization of the following TTL chips 7404, 7408 and 7432.
Include the following information in your report:
  1. Tabular description of the output functions (C, S2, S1).
  2. K-map for each of the output functions.
  3. Minimized Boolean expression using the above K-maps.
  4. Draw a full schematic for each of the circuits either neatly by hand or by any CAD program.
  5. Give an accurate count of the number of AND, OR and INV gates that you have used in your design.
  6. Give and accurate count of the number of 7404, 7408 and 7432 chips used in this design.
  7. Give all of the other components needed for the implementation of your prototype.
  8. Give a cost estimate of this implementation.
  9. Give an estimate of the time delay before output availability.
Supplemental information:
Note: If you choose to implement a circuit that is different than the minimized circuit, then you need to provide the reason.

Implementation notes: